This invention relates to voltage regulators. More specifically this invention relates to switching regulators with synchronous rectification.
A synchronous switching regulator typically includes a first transistor that is ON during a first portion of a switching cycle and a second transistor that is ON during a second portion of the switching cycle. During the first portion of the switching cycle, the first transistor conducts between a power supply and an inductor. The second transistor is typically OFF during the first portion of the cycle. In the first portion of the cycle, power is transmitted from the power supply through the first transistor to the inductor (which in turn is typically coupled to a load and/or load capacitor). During a second portion of the cycle, the second transistor, which may be referred to herein as the synchronous transistor, turns ON and couples ground (or some other suitable reference voltage) to the end of the inductor that is not coupled to the load. In certain parts of the switching cycle, both transistors may be OFF and the end of the inductor not coupled to the load may, in fact, be floating.
Switching regulators with synchronous rectification preferably require a comparator, or for the purposes of this application other suitable comparison circuit, that monitors current reversal across the synchronous transistor. An ideal comparator with zero propagation delay would simply trip—i.e., change from a first output state to a second output state—when a sign reversal is detected across the synchronous transistor. The output of the comparator is used to control the operation of the second transistor.
However, real comparators must offset the trip point to compensate for the propagation delays associated with the current reversal in the output inductor. The offset required depends on the propagation delay of the comparator and the time the inductor current takes to reach zero from the trip point. These two factors typically depend on the output voltage of the regulator and the inductor value used, both of which are typically beyond the IC (integrated circuit) designer's control. The current state of the art is to select the most likely output voltage and its corresponding inductor value, and then calculate the offset voltage the comparator needs. This approach works reasonably well for many applications. But for some applications the comparator either trips too early or too late, resulting in lowered efficiency.
It would be desirable to provide current reversal comparison circuits and methods that automatically adjusts for any suitable output voltage and/or inductor value.